IC Developers Links
Thanks very much for visiting us! Here are a few of the sites around the web that we recommend.
Make a selection from the options listed below:
Please report dead links.
Feedback and suggestions for inclusion are welcome and encouraged.
If you have any bookmarked web pages you would like to add,
let us know about them !
The focus should be on information directly useful for development,
rather than just links to the cadence home page for example.
Project Management
The NASA ASIC Guide
Although a little dated in places, contains a lot of useful info.
FUSE Network
The First Users Action (FUSE) offers a set of training material to support the introduction of new technologies...
Go Fabless
Free die-size and cost estimation tools. Some good white papers
Association for Project Management
UK branch containing links to stuff relevant to general project management
DTI Electronics Design
The Electronics Design Network (EDN) is the successor to DTI's successful Electronics Design Programme which ended in March 2004...
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DSP
The Scientists and Engineers Guide to DSP
A free book on the subject.
Useful DSP
Useful DSP Software from Rice University.
Technology Modelling
ALF home page
Advanced Library Format (ALF) Home Page. Draft ALF spec available.
EDIF
One of the world's most widely used Electronic Design Interchange Formats
IEEE DASC SDF
IEEE DASC Standard Delay Format (SDF). Access to draft SDF standard.
FPGA
Xilinx
Xilinx home page.
Altera
Altera home page.
VHDL
Doulos'"KnowHow"
Useful technical information, models, guidelines, tips and downloads.
Accellera.org
Industry group focusing on identifying new standards, development of standards and formats, and promoting the adoption of new methodologies.
VASG
VHDL Analysis and Standardization Group (VASG). Draft of VHDL 2000 available.
VHDL reference material
Compact Summary of VHDL
Modeling with VHDL
Course notes on Modeling with VHDL
Logic Design with VHDL
Course notes on Logic Design with VHDL
VHDL Language Guide
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Verilog
Doulos'"KnowHow"
Useful technical information, models, guidelines, tips and downloads.
Accellera.org
Industry group focusing on identifying new standards, development of standards and formats, and promoting the adoption of new methodologies.
Verilog-2001 Information Page
Verilog FAQ
v2html
The verilog to HTML converter
SystemVerilog
Cliff's SNUG'00 1st Place Paper On Nonblocking Verilog Assignments
UNIX
UNIX intro
UNIX
The UNIX System Home Page
UNIX
UNIX Commands and Utilities, Issue 4, Version 2 (click "See the PDF version on the web" link on the right, and register your details
to read this comprehensive doc).
GNU
GNU Home
GNU Project homepage ("GNU's Not UNIX").
The GNU Awk User's Guide
GNU sed, a stream editor
GNU make
GNU Manuals
Perl
www.perl.com
Publisher O'Reilly Perl source - Perl development, Perl conferences, ...
www.perl.org
The Perl cross platform programming language homepage.
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SystemC
Open SystemC Initiative
Everything you want to know about SystemC.
Verification
Open Verification Library
Assertion based verification.
The Verification Guild
"for the verification professional" -- a good verification links page on the site too.
Formal Equivalence Checking
Synopsys FV material
Mentor FV Material
Using Formality
1999 paper - dated but useful in places.
DFT
The NASA ASIC Guide DFT overview
Synopsys DFT material
RASSP Test Technology Overview
A Chipcentre DFT Article
Good for high level overview.
Bennett's Associates
DFT Guidelines from Goytatek
TSMC Design Kit Test Generator Usage Document
Fault Coverage Guidelines from Goyatek
You will need to download the traditional chinese font for Acrobat Reader.
STA
Cadence STA material
Synopsys STA material
STA Guidelines from Goyatek
Crosstalk
Synopsys Primetime-SI
Related material
Fast Coupling Interactions in STA
An interesting paper
Research Problems in Statically Verifying the Timing Behaviour of Digital Circuits
More interesting stuff.
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Synthesis
TCL for EDA
Arbitrarily placed under synthesis, contains scripts and info on DFT, STA and verification too - worth a visit !
VHDL Synthesis Interoperability Working Group
Draft docs and ref docs available.
Verilog Synthesis Interoperability
Good RTL coding style ref paper on front page.
Various Synopsys Docs
DC tutorial, Module Compiler User Guide, RTL coding styles, General Guidelines, Synth Quick Reference.
Deepchip.com
Not just Synthesis! - mirror for ESNUGs
IO and Pads
LVDS Owners Manual
The National Semiconductor LVDS Owners Manual.
Scripts
Collected links to pages containing various scripts for IC Development
- this does not mean Jaskay Technology recomends
their use! It's up to you to vet them.
Deepchip downloads
Loads of useful stuff !
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Note:
All users of this page should be aware that it is their responsibility to independently assess
all information obtained by following the links on this page.
Jaskay Technology (AJS ASIC Development Services Ltd) or its employees and directors in no
way take responsibility for the content of links or copyright issues arising from the content
of the links or subsequent use of information gained from following links placed on this page.
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