Video IP Products
All Video IP products have the AMBA
APB bus interface for register access where applicable. Variants for your
on-chip bus can be created if desired.
If you are interested in commissioning the development of new video IP then
please contact us and we will be
happy to assist you.
Colour Space Converters
Variants are available to convert between RGB, YUV, YIQ, YDbDr and YCbCr formats
Alpha Cross-Fader
Intended for video mixing and graphics overlay with a single alpha value, this
two-channel mixer will accept data from a frame buffer either pre-multiplied or
to be multiplied by alpha. Alpha
Mixer
Intended for video mixing and graphics overlay with one alpha value per channel,
this two-channel mixer will accept data from a frame buffer either
pre-multiplied or to be multiplied by alpha. Luminance
Keying Module Keys a background image into a foreground
image selectably above or below the keying luminance level. If you need it, we
have it. Brightness
, Contrast, Saturation and Hue Adjuster
Working in the YCbCr domain this module allows adjustment of brightness,
contrast, hue and saturation by the programming of register values.
Low Power, High Throughput 2D DCT/IDCT
This is our showcase product.
A low power, high throughput 2D DCT/IDCT for image compression. This has been designed to IEEE1180 specifications, making it suitable for use in MPEG2 systems.
Click here for details of the design process for this IP. Please refer to the datasheet for detailed specifications.

Features
Please note that HDL code is available for evaluation to enable customers to determine gate count and power dissipation
- IDCT IEEE1180-1990 compliant
- 0.25 clks/symbol throughput
- VGA 25fps 4:2:2 with 3.84MHz clk
- Very Low Power consumption
- Ultra low power when disabled
- High max clock speed
- Pipelined Design
- 28 clock cycle latency (19 initial)
- Flow control on input and output
- Output saturation logic included
- Up to 9bit 2's complement pixel data
- 12bit 2's complement DCT coeffs
- Fully synchronous design
- Asynchronous reset
- DCT or IDCT only variants
- ASIC or FPGA optimised variants
- Reduced area non-IEEE1180 variant
- "Drop-in" replacement for existing 2D-DCT/IDCT cores is possible
- RAM is not used, simplifying power-down, re-use, and reducing power consumption when function disabled

Applications
- Low Power or
- High Throughput applications
- JPEG, MPEG1/2/4, H261/3
- Digital Television
- Teleconferencing
- Medical Imaging
- Security Systems
- Battery operated products or
- Reduced chip package power rating
- Marketing advantage gained through low power or high throughput

Future Products
Our Video IP product range is planned to include JPEG encoder, JPEG decoder and JPEG codec (both the original JPEG and JPEG2000).
Our Audio IP product range is planned to include I2S and SPDIF interfaces.
|